The invention will be described in connection with a data communication system utilizing orthogonal frequency division multiplexing (OFDM). However, it is to be understood that the invention is not limited to systems utilizing OFDM.
In OFDM, the data symbols to be transmitted are mapped on a number of orthogonal sub carriers. A so-called cyclic prefix (CP) is appended to each data symbol in order to reduce problems with multipath propagation. The CP is a copy of the last part of the data symbol.
During any type of transmission and reception of data symbols various types of distortions are caused in the signal. This is also true in systems utilizing OFDM. In OFDM systems two types of distortion are caused, namely DC offset which origins from various parts of the receiver and may vary from data symbol to data symbol, and frequency offset which origins from a mismatch between oscillators in the transmitter and the receiver.
It should be pointed out that the DC offset is not DC in the sense that it is a stable function of the power of the receiver.
In packet based transmission protocols as for instance IEEE 802.11a the gain setting of the receiver may vary from packet to packet. Every time the gain changes, the DC offset will also change. There are also radio architectures that will cause a slowly varying DC offset.
One problem with the DC offset is that it limits the dynamic range available for the wanted signal. Another problem is that the DC offset may end up in the signal band when the frequency offset is corrected in the receiver. Therefore it is necessary to remove the DC offset in order to reduce the frequency offset, otherwise the performance degradation will be huge.
There are mainly two well-known methods for removing the DC offset from data symbols in communication systems utilizing OFDM.
In the first method, the received signal is filtered by means of a so-called notch filter. One disadvantage with the notch filter is that it is difficult to remove the DC offset without also filtering away some of the actual information. Also, the notch filter does not compensate for variations in the gain of the receiver.
In the second method the DC offset is estimated by means of averaging the received signal and subtracting the estimated DC offset from the signal. In packet based systems such as systems utilizing OFDM the average has to be calculated for a large number of consecutive data symbols in order to be accurate, resulting in a very long time to achieve a good estimate of the DC offset.
A known implementation of a receiver utilizing the above-mentioned second method for estimating and subtracting the DC offset is illustrated in FIG. 1.
In FIG. 1 an analog-to-digital converter (ADC) 1 with an input terminal I1 for receiving an input signal IN comprising data symbols with CPs is connected with its output terminal O1 to an input terminal I2 of a buffering circuit 2 and to an input terminal I3 of a DC offset estimation circuit 3. The buffering circuit 2 is connected with an output terminal O2 to one input terminal I4 of a subtracter 4. The DC offset estimation circuit 3 is connected with an output terminal O3 to another input terminal I4′ of the subtracter 4. The subtracter 4 has an output terminal O4 for an output signal OUT.
The data symbols that carry the information in the received signal are usually preceded by a so-called training sequence comprising training symbols. Among other things, this sequence serves to synchronize the transmitter and the receiver. During the reception of the training sequence DC offset estimation and removal is normally not performed. Nonetheless, received data symbols of the training sequence are used in order to form the base for calculating an initial DC offset estimate for the first data symbol actually carrying information. In this manner the first data symbol which carries information can be corrected with regard to DC offset.
The input signal IN is fed to the input terminal I1 of the ADC 1. After analog-to-digital conversion each data symbol of the signal is fed to and delayed in the buffering circuit 2. Simultaneously, the data symbols are fed to the input terminal I3 of the DC offset estimation circuit 3. In the DC offset estimation circuit 3 a DC offset estimate is calculated by averaging a predetermined number of the data symbols. From the beginning these data symbols can comprise data symbols actually carrying information and/or data symbols from the training sequence.
Each data symbol is delayed in the buffering circuit 4 until a DC offset estimate has been provided by the DC offset estimation circuit 3. Since a large number of symbols have to be included in order to achieve an accurate DC offset estimate, the introduced delay is substantial.
Subsequently, each data symbol from the buffering circuit 2 and the DC offset estimate from the DC offset estimation circuit 3 are fed to the subtracter 4, where the DC offset estimate is subtracted from each data symbol. The output terminal O4 of the subtracter 4 then provides the corrected data symbol as the output signal OUT.
As mentioned above, the known method is time-consuming and not so accurate.